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tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 1 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 ir receiver modules for remote control systems mechanical data pinning 1, 4, 5 = gnd, 2 = v s , 3 = out features ? very low supply current ? photo detectors and preamplifier in one package ? internal filter for pcm frequency ? supply voltage: 2.5 v to 5.5 v ? improved immunity against ambient light ? capable of side or top view ? two lenses for high sensitivity and wide receiving angle ? insensitive to supply voltage ripple and noise ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 description these products are miniaturized receivers for infrared remote control systems. a pin diode and a preamplifier are assembled on a lead frame, the epoxy package acts as an ir filter. the demodulated output signal can be directly decoded by a microprocessor. the tsop853.. is optimized to better suppress spurious pulses from energy saving fluorescent lamps. the tsop855.. has an excellent noise suppression. it is immune to dimmed lcd backlighting and any fluorescent lamps. agc3 and agc5 may also suppress some data signals in case of contin uous transmission. this component has not been qualified according to automotive specifications. block diagram application circuit 20427-1 1 5 4 2 3 parts table agc noisy environments and short bursts (agc3) very noisy environments and short bursts (agc5) carrier frequency 30 khz tsop85330 tsop85530 33 khz TSOP85333 tsop85533 36 khz tsop85336 (1)(2) tsop85536 (1)(2) 38 khz tsop85338 (3)(4)(5)(6) tsop85538 (3)(4)(5) 40 khz tsop85340 tsop85540 56 khz tsop85356 tsop85556 package pinning 1, 4, 5 = gnd, 2 = v s , 3 = out dimensions (m m) 8.0 h x 3.3 w x 2.7 l mounting smd application remote control best remote control code (1) mcir (2) rcmm (3) mitsubishi (4) recs-80 code (5) r-map (6) xmp-1, xmp-2 30 k v s out demo- gnd pass agc input pin band dulator control circuit 2 3 1, 4, 5 20445 c 1 ir receiver gnd circuit c r 1 + v s gnd transmitter with tsalxxxx v s v o 17170_5 out r 1 and c 1 are recommended for protection against eos. components should be in the range of 33 < r 1 < 1 k , c 1 > 0.1 f.
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 2 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 note ? stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress ratin g only and functional operation of the device at these or any other cond itions beyond those indicated in the operational sections of t his specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect the device reliability. typical characteristics (t amb = 25 c, unless otherwise specified) fig. 1 - output active low fig. 2 - puls e length and sensitivity in dark ambient absolute maximum ratings parameter test condition symbol value unit supply voltage v s - 0.3 to + 6 v supply current i s 3ma output voltage v o - 0.3 to (v s + 0.3) v output current i o 5ma junction temperature t j 100 c storage temperature range t stg - 25 to + 85 c operating temperature range t amb - 25 to + 85 c power consumption t amb 85 c p tot 10 mw soldering temperature t sd 260 c electrical and optical characteristics (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. typ. max. unit supply voltage v s 2.5 5.5 v supply current v s = 3.3 v, e v = 0 i sd 0.27 0.35 0.45 ma e v = 40 klx, sunlight i sh 0.45 ma transmission distance e v = 0, ir diode tsal6200, i f = 250 ma, test signal see fig. 1 d45m output voltage low i osl = 0.5 ma, e e = 0.7 mw/m 2 , test signal see fig. 1 v osl 100 mv minimum irradiance pulse width tolerance: t pi - 5/f o < t po < t pi + 6/f o , test signal see fig. 1 e e min. 0.1 0.25 mw/m 2 maximum irradiance t pi - 5/f o < t po < t pi + 6/f o , test signal see fig. 1 e e max. 30 w/m 2 directivity angle of half transmission distance ? 1/2 50 deg e e t t pi *) t v o v oh v ol t po 2) t 14337 optical test signal (ir diode tsal6200, i f = 0.4 a, n = 6 pulses, f = f 0 , t = 10 ms) output signal t d 1) 1) 3/f 0 < t d < 9/f 0 2) t pi - 4/f 0 < t po < t pi + 6/f 0 *) t pi 6/f 0 is recommended for optimal function 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.1 1 10 100 1000 10 000 e e - irradiance (mw/m2) t po - output pulse width (ms) input burst length = 950 nm, optical test signal, fig. 1 output pulse width 20760
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 3 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 3 - output function fig. 4 - output pulse diagram fig. 5 - frequency dependence of responsivity fig. 6 - sensitivity in bright ambient fig. 7 - sensitivity vs. supply voltage disturbances fig. 8 - sensitivity vs. electric field disturbances e e t v o v oh v ol t 600 s 600 s t = 60 ms t on t off 94 8134 optical test signal output signal , (see fig. 4) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.1 1 10 100 1000 10 000 e e - irradiance (mw/m2) t on , t off - output pulse width (ms) 20744 = 950 nm, optical test signal, fig. 3 t on t off 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.7 0.9 1.1 1.3 f/f 0 - relative frequency 16925 f = f 0 5 % f(3 db) = f 0 /10 e /e - rel. responsivity e min. e 0 0.5 1 1.5 2 2.5 3 3.5 4 0.01 0.1 1 10 100 e e - ambient dc irradiance (w/m2) e e min. - threshold irradiance (mw/m2) correlation with ambient light sources: 10 w/m2 = 1.4 klx (std. illum. a, t = 2855 k) 10 w/m2 = 8.2 klx (daylight, t = 5900 k) wavelength of ambient illumination: = 950 nm 20745 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1 10 100 1000 20746 e e min. - threshold irradiance (mw/m2) f = f 0 f = 20 khz f = 30 khz f = 100 hz f = 10 khz vs rms - ac voltage on dc supply voltage (mv) 0 50 100 150 200 250 300 350 400 450 500 0 500 1000 1500 2000 2500 3000 f - emi frequency (mhz) e - max. field strength (v/m) 20747
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 4 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 9 - maximal envelope duty cycle vs. burst length fig. 10 - sensitivity vs. ambient temperature fig. 11 - relative spectral sensitivity vs. wavelength fig. 12 - directivity 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0 20 40 60 80 100 120 burst length (number of cycles/burst) max. envelope duty cycle 22180-4 f = 38 khz, e e = 2 mw/m2 tsop855.. tsop853.. 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2 - 30 - 10 10 30 50 70 90 t amb - ambient temperature (c) e e min. - threshold irradiance (mw/m2) 20749 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 700 750 800 850 900 950 1000 1050 1100 - wavelength (nm) s( ) rel - relative spectral sensitivity 20431 20432 0.1 0.3 0.5 0.7 0.9 80 60 40 20 0 - 20 - 40 - 60 - 80
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 5 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 suitable data format the tsop853.. and tsop855.. series are designed to suppress spurious output pulses due to noise or disturbance signals. data and disturbance signals can be distinguished by the devices according to carrier frequency, burst length and envelope duty cycle. the data signal should be close to the band-pass center frequency (e.g. 38 khz) and fulfill the conditions in the table below. when a data signal is applied to the tsop853.. and tsop855.. series in the prese nce of a disturbance signal, the sensitivity of the receiver is reduced to insure that no spurious pulses are present at the output. some examples of disturbance signals which are suppressed are: ? dc light (e.g. from tungsten bulb or sunlight) ? continuous signals at any frequency ? modulated noise from fluorescent lamps with electronic ballasts fig. 13 - ir signal from fluorescent lamp with low modulation fig. 14 - ir signal from fluorescent lamp with high modulation notes ? for data formats with long bursts (more than 10 carrie r cycles) please see the da tasheet for tsop852.., tsop854.. ? example of compatible products for ir-codes: - tsop85336: mcir, rcmm - tsop85338: mitsubishi, recs-80 code, r-map, xmp-1, xmp-2 - tsop85356: mitsubishi, recs-80 code, r-map 0101520 time (ms) 16920 ir signal 5 0101520 time (ms) 16921 ir signal 5 tsop853.. tsop855.. minimum burst length 6 cy cles/burst 6 cycles/burst after each burst of length a minimum gap time is required of 6 to 35 cycles 10 cycles 6 to 24 cycles 10 cycles for bursts greater than a minimum gap time in the data stream is needed of 35 cycles > 6 x burst length 24 cycles > 25 ms maximum number of continuous short bursts/second 2000 2000 recommended for nec code yes yes recommended for rc5/rc6 code yes yes recommended for rcmm code yes yes recommended for r-step code) yes yes recommended for xmp code yes yes suppression of interference from fluorescent lamps even critical disturbance signals are suppressed (examples: signal pattern of fig. 13 and fig. 14) even critical disturbance signals are suppressed (examples: signal pattern of fig. 13 and fig. 14)
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 6 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 package dimensions in millimeters assembly instructions reflow soldering ? reflow soldering must be done within 72 h while stored under a max. tempe rature of 30 c, 60 % rh after opening the dry pack envelope ? set the furnace temperatures for pre-heating and heating in accordance with the reflow temperature profile as shown in the diagram. excercise extreme care to keep the maximum temperature below 260 c. the temperature shown in the profile means th e temperature at the device surface. since there is a temperature difference between the component and the circuit bo ard, it should be verified that the temperature of the device is accurately being measured ? handling after reflow should be done only after the work surface has been cooled off manual soldering ? use a soldering iron of 25 w or less. adjust the temperature of the so ldering iron below 300 c ? finish soldering within 3 s ? handle products only after the temperature has cooled off (2.2) (4.9) 1.7 nom. 1.7 nom. 8 1 1 3.3 2.74 not indicated to lerance s 0.25 propo s ed pad layout from component s ide (dim. for reference only) (0.5) (0.6) (5x) (r1.35) 1.7 nom 1.7 nom 2 0.7 (5x) ( s ideview a ss embly) (topview a ss embly) 1.1 0.8 (5x) 1.7 12 34 5 4 x 1.7 = 6.8 1.7 4 x 1.7 = 6.8 optional g nd pad connection not nece ss ary s pecification s according to din technical drawing s drawing-no.: 6.550-5292.01-4 i ss ue: 3; 19.11.10 20426 marking area pick and place area min. 1.5 po ss ible package deviation s cau s ed by tolerance s in the manufacturing proce ss either on pick and place s ide or s older pad s ide min. 1.5 0 - 0.1 (r1.35) 5:1
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 7 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 vishay lead (pb)-free reflow solder profile taping version tsop..tr dimensions in millimeters 0 50 100 150 200 250 300 0 50 100 150 200 250 300 t (s) t (c) 255 c 240 c 245 c max. 260 c max. 120 s max. 100 s 217 c max. 20 s max. ramp up 3 c/s max. ramp down 6 c/s max. 2 cycles allowed 19800 20628
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 8 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 taping version tsop..tt dimensions in millimeters 20629
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 9 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 label standard bar code labels for finished goods the standard bar code labels are product labels and used for identification of goods. the finished goods are packed in final packing area. the standard packing units are labeled with standard bar code labels be fore transported as finished goods to warehouses. the labels are on each packing unit and contain vishay semicond uctor gmbh specific data. dry packing the reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. final packing the sealed reel is packed in to a cardboard box. a secondary cardboard box is used for shipping purposes. recommended method of storage dry box storage is recommended as soon as the aluminum bag has been opened to preve nt moisture absorption. the following conditions should be observed, if dry boxes are not available: ? storage temperature 10 c to 30 c ? storage humidity 60 % rh max. after more than 72 h under these conditions moisture content will be too high for reflow soldering. in case of moisture absorptio n, the devices will recover to the former condition by drying under the following condition: 192 h at 40 c + 5 c / - 0 c and < 5 % rh (dry air/nitrogen) or 96 h at 60 c + 5 c and < 5 % rh for all device containers or 24 h at 125 c + 5 c not suitable for reel or tubes. an eia jedec ? standard jstd-020 level 4 label is included on all dry bags. vishay semiconductor gmbh standard bar code product label (finished goods) plain writing abbreviation length item-description -18 item-n u m b er ino 8 selection-code sel 3 lot-/serial-n u m b er batch 10 data-code cod 3 (yww) plant-code ptc 2 q u antity qty 8 accepted b y acc - packed b y pck - mixed code indicator mixed code - origin xxxxxxx+ company logo long bar code top type length item-n u m b er n8 plant-code n2 se qu ence-n u m b er x3 q u antity n8 total length -21 short bar code bottom type length selection-code x3 data-code n3 batch-n u m b er x10 filter -1 total length -17 aluminum bag label reel 15973
tsop853.., tsop855.. www.vishay.com vishay semiconductors not for new designs rev. 1.9, 07-nov-13 10 document number: 81860 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 eia jetec standard jstd-020 level 4 label is included on all dry bags esd precaution proper storage and handling pro cedures should be followed to prevent esd damage to the devices especially when they are removed from the antistatic shielding bag. electrostatic sensitive devices warning la bels are on the packaging. vishay semiconductors standard bar code labels the vishay semiconductors st andard bar code labels are printed at final packing areas. the labels are on each packing unit and contain vishay semiconductors specific data. bar code product label (example) caution this bag contains moisture-sensitive devices 1. shelf life in sealed bag: 12 months at < 40 c and < 90 % relative humidity (rh) 2. after this bag is opened, devices that will be subjected to soldering reflow or equivalent processing (peak package body temp. 260 c) must be 2a. mounted within 72 hours at factory condition of < 30 c/60 % rh or 2b. stored at < 5 % rh 3. devices require baking befor mounting if: humidity indicator card is > 10 % when read at 23 c 5 c or 2a. or 2b. are not met. 4. if baking is required, devices may be baked for: 192 hours at 40 c + 5 c/- 0 c and < 5 % rh (dry air/nitrogen) or 96 hours at 60 c 5 c and < 5 % rh for all device containers or 24 hours at 125 c 5 c not suitable for reels or tubes bag seal date: (if blank, see barcode label) note: level and body temperature defined by eia jedec standard j-std-020 4 level 22522 22178
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